Consider removing PD access to their own VSpace (or making it optional)

[midnightveil]

microkit/tool/microkit/src/capdl/builder.rs

Lines 609 to 613 in 2c888a9

	// Allow PD to access their own VSpace for ops such as cache cleaning on ARM.
	caps_to_insert_to_pd_cspace.push(capdl_util_make_cte(
	PD_VSPACE_CAP_IDX as u32,
	capdl_util_make_page_table_cap(pd_vspace_obj_id),
	));

On ARM, there are user-level cache operations that are faster and better to use in basically every way, so I don't think this is ever needed.

Other architectures I think would be similar.

However, this would be a breaking change.