Advanced Architecture Research Group UNIMORE
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axi
axi PublicForked from pulp-platform/axi
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
SystemVerilog
Repositories
- richie-acc-bench Public
Advanced-Architectures-UNIMORE/richie-acc-bench’s past year of commit activity - richie-synth-bench Public
This repository includes the synthetic benchmark suite used to evaluate the RICHIE System-Level Design (SLD) framework. This profiles SoC- and cluster-level memory contention in a multi-cluster accelerator-rich HeSoC.
Advanced-Architectures-UNIMORE/richie-synth-bench’s past year of commit activity - hero Public Forked from pulp-platform/hero
Patched fork of the Heterogeneous Research Platform (HERO), maintained specifically as a dependency for the Richie exploration framework.
Advanced-Architectures-UNIMORE/hero’s past year of commit activity - richie Public
Advanced-Architectures-UNIMORE/richie’s past year of commit activity - richie-sld-toolchain Public
Advanced-Architectures-UNIMORE/richie-sld-toolchain’s past year of commit activity - richie-hesoc Public
Advanced-Architectures-UNIMORE/richie-hesoc’s past year of commit activity - richie-cluster Public Forked from pulp-platform/pulp_cluster
The multi-core cluster of a PULP system.
Advanced-Architectures-UNIMORE/richie-cluster’s past year of commit activity - axi Public Forked from pulp-platform/axi
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
Advanced-Architectures-UNIMORE/axi’s past year of commit activity
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