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ranj063kv2019i
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sof-glk-nocodec: disable pipelines when disabling SSPs
When we added the flags to disable SSP0 and SSP1 on the UP2, we took the shortcut of just removing the PCMs in topology but left the pipelines and widgets in the topology in. While this works in practice to prevent us from testing those SSPs, the right way is to also remove those pipelines also when the SSPs are disabled. This stops tplgtool2.py from complaining constantly about this inconsistency since thesofproject/sof-test#1079 which made the sof-test verify-tplg-binary.sh fail every time: ``` tplgtool2.py sof-glk-nocodec.tplg ERROR: No pcm id=0 for widget=PCM0C ERROR: No pcm id=1 for widget=PCM1C ERROR: No pcm id=0 for widget=PCM0P ERROR: No pcm id=1 for widget=PCM1P ERROR: tplgtool2.py returned 4 ``` This change affects only sof-apl-nocodec and sof-glk-nocodec. Signed-off-by: Marc Herbert <marc.herbert@intel.com> Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
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Lines changed: 26 additions & 18 deletions

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tools/topology/topology1/sof-cavs-nocodec.m4

Lines changed: 26 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -101,17 +101,19 @@ dnl time_domain, sched_comp)
101101

102102
# Volume switch capture pipeline 2 on PCM 0 using max 2 channels of PIPE_BITS.
103103
# Set 1000us deadline on core SSP0_CORE_ID with priority 0
104-
PIPELINE_PCM_ADD(sof/pipe-volume-switch-capture.m4,
104+
ifdef(`DISABLE_SSP0',,
105+
`PIPELINE_PCM_ADD(sof/pipe-volume-switch-capture.m4,
105106
2, 0, 2, PIPE_BITS,
106107
1000, 0, SSP0_CORE_ID,
107-
48000, 48000, 48000)
108+
48000, 48000, 48000)')
108109

109110
# Volume switch capture pipeline 4 on PCM 1 using max 2 channels of PIPE_BITS.
110111
# Set 1000us deadline on core SSP1_CORE_ID with priority 0
111-
PIPELINE_PCM_ADD(sof/pipe-volume-switch-capture.m4,
112+
ifdef(`DISABLE_SSP1',,
113+
`PIPELINE_PCM_ADD(sof/pipe-volume-switch-capture.m4,
112114
4, 1, 2, PIPE_BITS,
113115
1000, 0, SSP1_CORE_ID,
114-
48000, 48000, 48000)
116+
48000, 48000, 48000)')
115117

116118
# Volume switch capture pipeline 6 on PCM 2 using max 2 channels of PIPE_BITS.
117119
# Set 1000us deadline with priority 0 on core SSP2_CORE_ID
@@ -132,19 +134,21 @@ dnl deadline, priority, core, time_domain)
132134
# playback DAI is SSP0 using 2 periods
133135
# Buffers use DAI_BITS format, 1000us deadline with priority 0 on core SSP0_CORE_ID
134136
# The 'NOT_USED_IGNORED' is due to dependencies and is adjusted later with an explicit dapm line.
135-
DAI_ADD(sof/pipe-mixer-volume-dai-playback.m4,
137+
ifdef(`DISABLE_SSP0',,
138+
`DAI_ADD(sof/pipe-mixer-volume-dai-playback.m4,
136139
1, SSP, SSP0_IDX, NoCodec-0,
137140
NOT_USED_IGNORED, 2, DAI_BITS,
138-
1000, 0, SSP0_CORE_ID, SCHEDULE_TIME_DOMAIN_TIMER, 2, 48000)
141+
1000, 0, SSP0_CORE_ID, SCHEDULE_TIME_DOMAIN_TIMER, 2, 48000)')
139142

140143
# Low Latency playback pipeline 1 on PCM 0 using max 2 channels of PIPE_BITS.
141144
# Set 1000us deadline on core SSP0_CORE_ID with priority 0
142-
PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4,
145+
ifdef(`DISABLE_SSP0',,
146+
`PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4,
143147
7, 0, 2, PIPE_BITS,
144148
1000, 0, SSP0_CORE_ID,
145149
48000, 48000, 48000,
146150
SCHEDULE_TIME_DOMAIN_TIMER,
147-
PIPELINE_PLAYBACK_SCHED_COMP_1)
151+
PIPELINE_PLAYBACK_SCHED_COMP_1)')
148152

149153
# Deep buffer playback pipeline 11 on PCM 3 using max 2 channels of PIPE_BITS.
150154
# Set 1000us deadline on core SSP0_CORE_ID with priority 0.
@@ -158,33 +162,37 @@ PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4,
158162

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# capture DAI is SSP0 using 2 periods
160164
# Buffers use DAI_BITS format, 1000us deadline with priority 0 on core SSP0_IDX
161-
DAI_ADD(sof/pipe-dai-capture.m4,
165+
ifdef(`DISABLE_SSP0',,
166+
`DAI_ADD(sof/pipe-dai-capture.m4,
162167
2, SSP, SSP0_IDX, NoCodec-0,
163168
PIPELINE_SINK_2, 2, DAI_BITS,
164-
1000, 0, SSP0_CORE_ID, SCHEDULE_TIME_DOMAIN_TIMER)
169+
1000, 0, SSP0_CORE_ID, SCHEDULE_TIME_DOMAIN_TIMER)')
165170

166171
# playback DAI is SSP1 using 2 periods
167172
# Buffers use DAI_BITS format, 1000us deadline with priority 0 on core SSP1_CORE_ID
168-
DAI_ADD(sof/pipe-mixer-volume-dai-playback.m4,
173+
ifdef(`DISABLE_SSP1',,
174+
`DAI_ADD(sof/pipe-mixer-volume-dai-playback.m4,
169175
3, SSP, SSP1_IDX, NoCodec-1,
170176
NOT_USED_IGNORED, 2, DAI_BITS,
171-
1000, 0, SSP1_CORE_ID, SCHEDULE_TIME_DOMAIN_TIMER, 2, 48000)
177+
1000, 0, SSP1_CORE_ID, SCHEDULE_TIME_DOMAIN_TIMER, 2, 48000)')
172178

173179
# Low Latency playback pipeline 8 on PCM 1 using max 2 channels of PIPE_BITS.
174180
# Set 1000us deadline on core SSP1_CORE_ID with priority 0
175-
PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4,
181+
ifdef(`DISABLE_SSP1',,
182+
`PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4,
176183
8, 1, 2, PIPE_BITS,
177184
1000, 0, SSP1_CORE_ID,
178185
48000, 48000, 48000,
179186
SCHEDULE_TIME_DOMAIN_TIMER,
180-
PIPELINE_PLAYBACK_SCHED_COMP_3)
187+
PIPELINE_PLAYBACK_SCHED_COMP_3)')
181188

182189
# capture DAI is SSP1 using 2 periods
183190
# Buffers use DAI_BITS format, 1000us deadline with priority 0 on core SSP1_CORE_ID
184-
DAI_ADD(sof/pipe-dai-capture.m4,
191+
ifdef(`DISABLE_SSP1',,
192+
`DAI_ADD(sof/pipe-dai-capture.m4,
185193
4, SSP, SSP1_IDX, NoCodec-1,
186194
PIPELINE_SINK_4, 2, DAI_BITS,
187-
1000, 0, SSP1_CORE_ID, SCHEDULE_TIME_DOMAIN_TIMER)
195+
1000, 0, SSP1_CORE_ID, SCHEDULE_TIME_DOMAIN_TIMER)')
188196

189197
# playback DAI is SSP2 using 2 periods
190198
# Buffers use DAI_BITS format, 1000us deadline with priority 0 on core SSP2_CORE_ID
@@ -214,8 +222,8 @@ SectionGraph."mixer-host" {
214222

215223
lines [
216224
# connect mixer dai pipelines to PCM pipelines
217-
dapm(PIPELINE_MIXER_1, PIPELINE_SOURCE_7)
218-
dapm(PIPELINE_MIXER_3, PIPELINE_SOURCE_8)
225+
ifdef(`DISABLE_SSP0',,`dapm(PIPELINE_MIXER_1, PIPELINE_SOURCE_7)')
226+
ifdef(`DISABLE_SSP1',, `dapm(PIPELINE_MIXER_3, PIPELINE_SOURCE_8)')
219227
dapm(PIPELINE_MIXER_5, PIPELINE_SOURCE_9)
220228
]
221229
}

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